Audited Supplier
LAQS-LR4M
Telephone, Computer, Workstation, Server, Mobile phone, Data Center
Both Wired and Wireless
Ethernet, GPRS, Data, Voice
Data, Voice, Message
CE, ISO, RoHS, FCC
New
Link-All
Blister Pack
Size: 22*20*8CM
China
8517706000
Product Description
40Gb/s QSFP+ Transceiver 10KM
LAQS-LR4M
Product Features
Four-channel full-duplex receiver modules
Data rate up to 11.2Gbit/s per channel
Up to 10km transmission of single mode fiber
Low power consumption <2.5W, meet class 3
Operating case temperature: 0 to 70ºC
3.3V power supply voltage
Hot Pluggable QSFP form factor
RoHS 6 compliant
Single MPO receptacle
Built-in digital diagnostic function
Applications
Infiniband QDR and DDR interconnects
40G Ethernet
Proprietary High Speed Interconnections
Data center
Standard
Compliant to IEEE Std 802.3ba, 40GBASE-LR4
Product Features
Four-channel full-duplex receiver modules
Data rate up to 11.2Gbit/s per channel
Up to 10km transmission of single mode fiber
Low power consumption <2.5W, meet class 3
Operating case temperature: 0 to 70ºC
3.3V power supply voltage
Hot Pluggable QSFP form factor
RoHS 6 compliant
Single MPO receptacle
Built-in digital diagnostic function
Applications
Infiniband QDR and DDR interconnects
40G Ethernet
Proprietary High Speed Interconnections
Data center
Standard
Compliant to IEEE Std 802.3ba, 40GBASE-LR4
Compliant to SFF-8436
RoHS Compliant
Product Description
The Link-all's LAQS-LR4Mis a Four-Channel, Pluggable, Parallel, Fiber-Optic QSFP+ Transceiver for InfiniBand
QDR/DDR/SDR, 10G/8G/4G/2G fiber channel, PCIe and SAS Applications. The QSFP full-duplex optical module offers
4 independent transmit and receive channels, each capable of 10.3Gbps operation for an aggregate data rate of
40Gbps 10km using single mode fiber. These modules are designed to operate over single mode fiber systems using 1310nm DFB laser array. An optical fiber ribbon cable with an MPO/MTPTM connector can be plugged into the QSFP module receptacle. QSFP+ PSM LR4 is one kind of parallel transceiver which provides increased port density and total
system cost savings.
Transceiver Block Diagram
Absolute Maximum Ratings
Recommended Operating Conditions
Optical Characteristics
Note:
1.Transmitter wavelength, RMS spectral width and power need to meet the OMA minus TDP specs to guarantee link performance.
2. The eye diagram is tested with 1000 waveform.
Electrical Characteristics
Diagnostic Monitoring Interface
Digital diagnostics monitoring function is available on all QSFP+ module. A 2-wire serial interface provides user to contact with module. The structure of the memory is shown in flowing. The memory space is arranged into a lower, single page, address space of 128 bytes and multiple upper address space pages. This structure permits timely access to addresses in the lower page, such as Interrupt Flags and Monitors. Less time critical time entries, such as serial ID information and threshold settings, are available with the Page Select function. The interface address used is A0xh and is mainly used for time critical data like interrupt handling in order to enable a one-time-read for all data related to an interrupt situation. After an interrupt, IntL has been asserted, the host can read out the flag field to determine the affected channel and type of flag.
Notes:
1.Due to measurement accuracy of different single mode fibers, there could be an additional +/- 1 dB fluctuation, or
a +/- 3 dB total accuracy.
ModSelL Pin
The ModSelL is an input pin. When held low by the host, the module responds to 2-wi re serial communication
commands. The ModSelL allows the use of multiple QSFP modules on a single 2-wire interface bus. When the
ModSelL is "High ", the module will not respond to any 2-wire interface communication from the host. ModSelL has
an internal pull-up in the module.
ResetL Pin
Reset. LPMode_ Reset has an internal pull-up in the module. A low level on the Reset L pin for longer than the
minimum pulse length (t_Reset_i nit) initiates a complete module reset, returning all user module settings to their default state. Module Reset Assert Time (t_init) starts on the rising edge after the low level on the Reset L pin is
released. During the execution of a reset (t_init) the host shall disregard all status bits until the module indicates a completion of the reset interrupt. The module indicates this by posting an IntL signal with the Data_Not_Ready bit
negated. Note that on power up (including hot insertion) the module will post this completion of reset interrupt
without requiring a reset.
LPMode Pin
Link-all's LAQS-LR4M operate in the low power mode (less than 1.5 W power consumption) This pin active high will
decrease power consumption to less than 1W.
ModPrsL Pin
Mod PrsL is pulled up to Vcc on the host board and grounded in the module. The Mod PrsL is asserted " Low" when the module is inserted and deasserted "High " when the module is physically absent from the host connector.
IntL Pin
IntL is an output pin. When "Low" , it indicates a possible module operational fault or a status critical to the host system. The host identifies the source of the interrupt by using the 2-wire serial interface. The IntL pin is an open
collector output and must be pulled up to Vcc on the host board.
Pin Function Definitions
Notes:
1. GND is the symbol for single and supply(power) common for QSFP modules, All are common within the QSFP module and all module voltages are referenced to this potential otherwise noted. Connect these directly to the host board signal common ground plane. Laser output disabled on TDIS >2.0V or open, enabled on TDIS <0.8V.
2.VccRx, Vcc1 and VccTx are the receiver and transmitter power suppliers and shall be applied
concurrently. Recommended host board power supply filtering is shown below. VccRx, Vcc1 and VccTx may be internally connected within the QSFP transceiver module in any combination. The connector
pins are each rated for maximum current of 500mA.
Regulatory Compliance
Recommended Circuit
ESD
This transceiver is specified as ESD threshold 1kV for SFI pins and 2kV for all other electrical input pins, tested per MIL-STD-883, Method 3015.4 /JESD22-A114-A (HBM). However, normal ESD precautions are still required during the handling of this module. This transceiver is shipped in ESD protective packaging. It should be removed from
the packaging and handled only in an ESD protected environment.
Laser Safety
This is a Class 1 Laser Product according to IEC 60825- 1:2007. This product complies with 21 CFR 1040. 10 and
1040. 11 except for deviations pursuant to Laser Notice No. 50, dated (June 24, 2007).
Outline Dimensions
Unit:mm
Optical Interface Lanes and Assignment
Attention: To minimize MPO connection induced reflections, an MPO receptacle with 8-degree angled end-face is utilized for this product. A male MPO connector with 8-degree end-face should be used with this product as
illustrated in Figure below.
Attention: To minimize MPO connection induced reflections, an MPO receptacle with 8 - degree angled end- face is utilized for this product. A male MPO connector with 8 - degree end-face should be used with this product as illustrated in Figure below.
Outside View of the QSFP Module MTP/MPO
Ordering Information
Notes:
If you need more customized services, please contact us
LAQS-LR4M
Product Features
Four-channel full-duplex receiver modules
Data rate up to 11.2Gbit/s per channel
Up to 10km transmission of single mode fiber
Low power consumption <2.5W, meet class 3
Operating case temperature: 0 to 70ºC
3.3V power supply voltage
Hot Pluggable QSFP form factor
RoHS 6 compliant
Single MPO receptacle
Built-in digital diagnostic function
Applications
Infiniband QDR and DDR interconnects
40G Ethernet
Proprietary High Speed Interconnections
Data center
Standard
Compliant to IEEE Std 802.3ba, 40GBASE-LR4
Product Features
Four-channel full-duplex receiver modules
Data rate up to 11.2Gbit/s per channel
Up to 10km transmission of single mode fiber
Low power consumption <2.5W, meet class 3
Operating case temperature: 0 to 70ºC
3.3V power supply voltage
Hot Pluggable QSFP form factor
RoHS 6 compliant
Single MPO receptacle
Built-in digital diagnostic function
Applications
Infiniband QDR and DDR interconnects
40G Ethernet
Proprietary High Speed Interconnections
Data center
Standard
Compliant to IEEE Std 802.3ba, 40GBASE-LR4
Compliant to SFF-8436
RoHS Compliant
Product Description
The Link-all's LAQS-LR4Mis a Four-Channel, Pluggable, Parallel, Fiber-Optic QSFP+ Transceiver for InfiniBand
QDR/DDR/SDR, 10G/8G/4G/2G fiber channel, PCIe and SAS Applications. The QSFP full-duplex optical module offers
4 independent transmit and receive channels, each capable of 10.3Gbps operation for an aggregate data rate of
40Gbps 10km using single mode fiber. These modules are designed to operate over single mode fiber systems using 1310nm DFB laser array. An optical fiber ribbon cable with an MPO/MTPTM connector can be plugged into the QSFP module receptacle. QSFP+ PSM LR4 is one kind of parallel transceiver which provides increased port density and total
system cost savings.
Transceiver Block Diagram
Absolute Maximum Ratings
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Note |
| Storage Temperature | TS | -40 | +85 | °C | ||
| Supply Voltage | VCCT, R | -0.3 | 3.6 | V | ||
| Relative Humidity | RH | 0 | 85 | % | ||
| Input Voltage | Vin | -0.3 | VCC+0.3 |
Recommended Operating Conditions
| Parameter | Symbol | Min. | Typical | Max. | Unit |
| Case operating Temperature | TOP | 0 | +70 | °C | |
| Supply Voltage | VCCT, R | +3.135 | +3.3 | +3.465 | V |
| Power Consumption | PD | 1.7 | 2.5 | W | |
| Data Rate, each Lane | DR | 10.3 | Gb/s | ||
| Data Speed Tolerance | DR | - 100 | +100 | ppm | |
| Link Distance with G.652 | D | 0 | 10 | km |
Optical Characteristics
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Note |
| Transmitter | ||||||
| Center Wavelength | λc | 1270 | 1310 | 1350 | nm | 1 |
| RMS Spectral Width | λ rms | 3.5 | nm | 1 | ||
| Average Launch Power, each lane | PAVG | -5.5 | -0.5 | +2.3 | dBm | |
| Optical Modulation Amplitude (OMA) | POMA | -4.5 | -0.5 | +3.5 | dBm | 1 |
| Difference in Launch Power between any two lanes | Ptx,diff | 5.0 | dB | |||
| Launch Power in OMA minus Transmitter and Dispersion Penalty (TDP), each Lane | OMA-TDP | -9.7 | dBm | 1 | ||
| Rise/Fall Time | Tr/Tf | 50 | ps | |||
| Extinction Ratio | ER | 3.5 | dB | |||
| Relative Intensity Noise | Rin | - 128 | dB/Hz | |||
| Optical Return Loss Tolerance | TOL | 12 | dB | |||
| Transmitter Reflectance | RT | - 12 | dB | |||
| Transmitter Eye Mask Margin | EMM | 10 | % | 2 | ||
| Transmitter Eye Mask Definition {X1, X2, X3, Y1, Y2, Y3} | {0.25, 0.4, 0.45, 0.25, 0.28, 0.4} | |||||
| Average Launch Power OFF Transmitter, each Lane | Poff | -30 | dBm | |||
| Receiver | ||||||
| Center Wavelength | λc | 1270 | 1310 | 1350 | nm | 1 |
| Damage Threshold | THd | +3 | dBm | |||
| Overload, each lane | OVL | +2.3 | dBm | |||
| Receiver Sensitivity in OMA, each Lane | SEN | - 11.5 | dBm | |||
| Difference in Receive Power between any two Lanes (OMA) | Prx,diff | 5.0 | dB | |||
| Signal Loss Assert Threshold | LOSA | -30 | dBm | |||
| Signal Loss Deassert Threshold | LOSD | - 15 | dBm | |||
| LOS Hysteresis | LOSH | 0.5 | 6 | dB | ||
| Optical Return Loss | ORL | - 12 | dBm | |||
| Receive Electrical 3dB upper Cutoff Frequency, each Lane | Fc | 12 | GHz | |||
1.Transmitter wavelength, RMS spectral width and power need to meet the OMA minus TDP specs to guarantee link performance.
2. The eye diagram is tested with 1000 waveform.
Electrical Characteristics
| Parameter | Symbol | Min | Typ | Max | Unit | Note |
| Differential input impedance | Zin | 90 | 100 | 110 | ohm | |
| Differential Output impedance | Zout | 90 | 100 | 110 | ohm | |
| Differential input voltage amplitude | ΔVin | 300 | 1100 | mVp-p | ||
| Differential output voltage amplitude | ΔVout | 500 | 800 | mVp-p | ||
| Bit Error Rate | BR | E-12 | ||||
| Input Logic Level High | VIH | 2.0 | VCC | V | ||
| Input Logic Level Low | VIL | 0 | 0.8 | V | ||
| Output Logic Level High | VOH | VCC-0.5 | VCC | V | ||
| Output Logic Level Low | VOL | 0 | 0.4 | V |
Diagnostic Monitoring Interface
Digital diagnostics monitoring function is available on all QSFP+ module. A 2-wire serial interface provides user to contact with module. The structure of the memory is shown in flowing. The memory space is arranged into a lower, single page, address space of 128 bytes and multiple upper address space pages. This structure permits timely access to addresses in the lower page, such as Interrupt Flags and Monitors. Less time critical time entries, such as serial ID information and threshold settings, are available with the Page Select function. The interface address used is A0xh and is mainly used for time critical data like interrupt handling in order to enable a one-time-read for all data related to an interrupt situation. After an interrupt, IntL has been asserted, the host can read out the flag field to determine the affected channel and type of flag.
| Parameter | Symbol | Min | Max | Unit | Notes |
| Temperature monitor absolute error | DMI_Temp | -3 | +3 | degC | Over operating temp |
| Supply voltage monitor absolute error | DMI _VCC | -0.1 | +0.1 | V | Full operating range |
| Channel RX power monitor absolute error | DMI_RX_Ch | -3 | 3 | dB | 1 |
| Channel Bias current monitor | DMI_Ibias_Ch | - 10% | 10% | mA | |
| Channel TX power monitor absolute error | DMI_TX_Ch | -3 | 3 | dB | 1 |
1.Due to measurement accuracy of different single mode fibers, there could be an additional +/- 1 dB fluctuation, or
a +/- 3 dB total accuracy.
ModSelL Pin
The ModSelL is an input pin. When held low by the host, the module responds to 2-wi re serial communication
commands. The ModSelL allows the use of multiple QSFP modules on a single 2-wire interface bus. When the
ModSelL is "High ", the module will not respond to any 2-wire interface communication from the host. ModSelL has
an internal pull-up in the module.
ResetL Pin
Reset. LPMode_ Reset has an internal pull-up in the module. A low level on the Reset L pin for longer than the
minimum pulse length (t_Reset_i nit) initiates a complete module reset, returning all user module settings to their default state. Module Reset Assert Time (t_init) starts on the rising edge after the low level on the Reset L pin is
released. During the execution of a reset (t_init) the host shall disregard all status bits until the module indicates a completion of the reset interrupt. The module indicates this by posting an IntL signal with the Data_Not_Ready bit
negated. Note that on power up (including hot insertion) the module will post this completion of reset interrupt
without requiring a reset.
LPMode Pin
Link-all's LAQS-LR4M operate in the low power mode (less than 1.5 W power consumption) This pin active high will
decrease power consumption to less than 1W.
ModPrsL Pin
Mod PrsL is pulled up to Vcc on the host board and grounded in the module. The Mod PrsL is asserted " Low" when the module is inserted and deasserted "High " when the module is physically absent from the host connector.
IntL Pin
IntL is an output pin. When "Low" , it indicates a possible module operational fault or a status critical to the host system. The host identifies the source of the interrupt by using the 2-wire serial interface. The IntL pin is an open
collector output and must be pulled up to Vcc on the host board.
Pin Function Definitions
| Pin | Logic | Symbol | Name /Description | Re f. |
| 1 | GND | Ground | 1 | |
| 2 | CML-I | Tx2n | Transmitter Inverted Data Input | |
| 3 | CML-I | Tx2p | Transmitter Non-Inverted Data output | |
| 4 | GND | Ground | 1 | |
| 5 | CML-I | Tx4n | Transmitter Inverted Data Output | |
| 6 | CML-I | Tx4p | Transmitter Non-Inverted Data Output | |
| 7 | GND | Ground | 1 | |
| 8 | LVTTL-I | ModSelL | Module Select | |
| 9 | LVTTL-I | ResetL | Module Reset | |
| 10 | VccRx | +3.3V Power Supply Receiver | 2 | |
| 11 | LVCMOS-I/O | SCL | 2-Wire Serial Interface Clock | |
| 12 | LVCMOS-I/O | SDA | 2-Wire Serial Interface Data | |
| 13 | GND | Ground | 1 | |
| 14 | CML-O | Rx3p | Receiver Inverted Data Output | |
| 15 | CML-O | Rx3n | Receiver Non-Inverted Data Output | |
| 16 | GND | Ground | 1 | |
| 17 | CML-O | Rx1p | Receiver Inverted Data Output | |
| 18 | CML-O | Rx1n | Receiver Non-Inverted Data Output | |
| 19 | GND | Ground | 1 | |
| 20 | GND | Ground | 1 | |
| 21 | CML-O | Rx2n | Receiver Inverted Data Output | |
| 22 | CML-O | Rx2p | Receiver Non-Inverted Data Output | |
| 23 | GND | Ground | 1 | |
| 24 | CML-O | Rx4n | Receiver Inverted Data Output | |
| 25 | CML-O | Rx4p | Receiver Non-Inverted Data Output | |
| 26 | GND | Ground | 1 | |
| 27 | LVTTL-O | ModPrsL | Module Present | |
| 28 | LVTTL-O | IntL | Interrupt | |
| 29 | VccTx | +3.3V Power Supply Transmitter | 2 | |
| 30 | Vcc1 | +3.3V Power Supply | 2 | |
| 31 | LVTTL-I | LPMode | Low Power Mode | |
| 32 | GND | Ground | 1 | |
| 33 | CML-I | Tx3p | Transmitter Inverted Data Output | |
| 34 | CML-I | Tx3n | Transmitter Non-Inverted Data Output | |
| 35 | GND | Ground | 1 | |
| 36 | CML-I | Tx1p | Transmitter Inverted Data Output | |
| 37 | CML-I | Tx1n | Transmitter Non-Inverted Data Output | |
| 38 | GND | Ground | 1 |
Notes:
1. GND is the symbol for single and supply(power) common for QSFP modules, All are common within the QSFP module and all module voltages are referenced to this potential otherwise noted. Connect these directly to the host board signal common ground plane. Laser output disabled on TDIS >2.0V or open, enabled on TDIS <0.8V.
2.VccRx, Vcc1 and VccTx are the receiver and transmitter power suppliers and shall be applied
concurrently. Recommended host board power supply filtering is shown below. VccRx, Vcc1 and VccTx may be internally connected within the QSFP transceiver module in any combination. The connector
pins are each rated for maximum current of 500mA.
Regulatory Compliance
| Feature | Standard | Performance |
| Electromagnetic Interference (EMI) | FCC Part 15 Class B EN 55022:2010 , Class B | Compatible with standards |
| Electromagnetic susceptibility (EMS) | EN 55024:2010 | Compatible with standards |
Laser Eye Safety | FDA 21CFR 1040. 10 and 1040. 11 EN60950, EN ( IEC) 60825- 1,2 | Compatible with Class I laser product |
Recommended Circuit
ESD
This transceiver is specified as ESD threshold 1kV for SFI pins and 2kV for all other electrical input pins, tested per MIL-STD-883, Method 3015.4 /JESD22-A114-A (HBM). However, normal ESD precautions are still required during the handling of this module. This transceiver is shipped in ESD protective packaging. It should be removed from
the packaging and handled only in an ESD protected environment.
Laser Safety
This is a Class 1 Laser Product according to IEC 60825- 1:2007. This product complies with 21 CFR 1040. 10 and
1040. 11 except for deviations pursuant to Laser Notice No. 50, dated (June 24, 2007).
Outline Dimensions
Unit:mm
Optical Interface Lanes and Assignment
Attention: To minimize MPO connection induced reflections, an MPO receptacle with 8-degree angled end-face is utilized for this product. A male MPO connector with 8-degree end-face should be used with this product as
illustrated in Figure below.
Attention: To minimize MPO connection induced reflections, an MPO receptacle with 8 - degree angled end- face is utilized for this product. A male MPO connector with 8 - degree end-face should be used with this product as illustrated in Figure below.
Outside View of the QSFP Module MTP/MPO
| Fiber NO. | Lane Assignment |
| 1 | RX0 |
| 2 | RX1 |
| 3 | RX2 |
| 4 | RX3 |
| 5 | Not Used |
| 6 | Not Used |
| 7 | Not Used |
| 8 | Not Used |
| 9 | TX3 |
| 10 | TX2 |
| 11 | TX1 |
| 12 | TX0 |
Ordering Information
| Ordering P/Ns | Description |
LAQS-LR4M | 40Gb/s QSFP+ LR4 Transceiver 10KM DDM,MTP/MPO Receptacle, Commercial Temperature |
Notes:
If you need more customized services, please contact us
